Address Generation - Address Generation - 2026.1 English - UG1483

The automatic address-generation process assumes the following conditions:

1. Each AXI4-Lite gateway uses a unique address offset which aligns with a 32-bit word boundary (that is, a multiple of 4).
2. Addressing begins at zero.
3. Addressing assignment is incremental in the lexicographical order of the gateways. In the event two gateways have the same name - disambiguation is arbitrary.
4. All AXI4-Lite gateways must be less than 32-bits, or the system issues an error.
5. If an AXI4-Lite gateway is less than 32 bits wide, the system assigns LSBs from the internal register to the Design Under Test (DUT).
6. The tool uses the following criteria to manage the user-specified offset addresses:
   1. All user-specified addresses are allocated to AXI4-Lite gateways before automatic allocation.
   2. If two user-specified addresses are the same, an error issues only during generation (otherwise it is ignored).
   3. If the remaining AXI4-Lite gateways are set to allocate addresses automatically, Model Composer attempts to fill the "holes" left behind by user-specified addressing.