AXI4-Lite Slave Interface Generation - AXI4-Lite Slave Interface Generation - 2026.1 English - UG1483

Vitis Model Composer User Guide (UG1483)

Document ID
UG1483
Release Date
2026-06-23
Version
2026.1 English

Typically, design modules that you develop in Model Composer form a subsystem of a larger DSP or Video system. These Model Composer modules are typically algorithmic and data path heavy modules. It is best that you create them in a visually-rich environment such as MATLAB/Simulink. The larger system is typically assembled from IP from the AMD Vivado™ IP catalog. These IPs typically use standard stream and control interfaces like AXI4-Lite Slave. You typically assemble the larger system using a tool such as Vivado IP integrator.

This topic describes features in Model Composer that allow you to create a standard AXI4-Lite Slave interface for a Model Composer module and then export the module to the AMD Vivado™ IP catalog for later inclusion in a larger design using IP integrator. Model Composer also allows creation of multiple AXI4-Lite Slave interfaces across multiple clock domains.