Description
Warning: [HLS 200-1976] Enabling free running
pipeline (frp) architecture on pipeline '
VITIS_LOOP_26_1' in module
'process_r'. Estimated max control fanout for pipeline is
452.Explanation
Displays the max fanout for the given pipeline that is saved by switching to an FRP style.
Example
void process(int in_buffer[K], int out_buffer[K], int ind)
{
#pragma HLS inline off
for (int i=0; i<K; i++)
#pragma HLS pipeline
out_buffer[i] = ind * in_buffer[i];
}