The TDD control hardware block demonstrates the TDD power up/down of each ADC and DAC channel. The block can be used as a reference on how to drive the real-time signal TDD pins, power and performance measurements, and debugging. The block has the following features:
- A set of two counters determine the number of symbols per frame and the number of frames
- The number of symbols is programmable, and the number of frames is always 10
- A map of downlink/uplink determine which TDD pins are asserted (DAC or ADC)
- A programmable guard band is possible
- Two trigger modes for the ADC: immediate or programmable
- The ADC programmable trigger can select the frame and symbol
- A programmable delay can be added on the trigger, available in each tile
The following figure shows a representation of the frame and symbol composition.
Figure 1. Frames and Symbols Representation