The following table lists the TDD control block ports.
| Port Name | I/O | Clock | Description |
|---|---|---|---|
| S00_AXI | AXI port | S00_AXI_ACLK | AXI control port |
| DACx_CLK | In | DAC AXI4-Stream clock | |
| ADCx_CLK | In | ADC AXI4-Stream clock | |
| DACxx_tdd_mode | Out | S00_AXI_ACLK | Connect to DACxx TDD mode pin |
| ADCxx_tdd_mode | Out | S00_AXI_ACLK | Connect to ADCxx TDD mode pin |
| Hw_trigger_en_x | Out | ADC AXI4-Stream clock | Enable external trigger on capture block |
| Trigger_x | Out | ADC AXI4-Stream clock | External trigger |
| Trigger_ext | Out | Dac0_clk | External trigger for DAC |