Example Usage - UG1433

Zynq UltraScale+ RFSoC ZCU208 and ZCU216 RF Data Converter Evaluation Tool User Guide (UG1433)

Document ID
UG1433
Release Date
2024-09-26
Revision
1.4 English

The software commands are documented in Command List. The commands can be entered into the Command log window of the RF Evaluation tool GUI ( RF Data Converter Interface User Guide (UG1309). The following examples show the command sequences for DAC and ADC, respectively.

DAC Example

  1. Write 1 into the DAC/ADC TDD mode pin register.
    • SetTDDRTSPinCtrl 1 0x0001 enables the TDD on DAC tile 0 channel 0.
    • SetTDDRTDPinCtrl DAC/ADC Channel_mask to 1 for DAC and 0 for ADC. Channel mask bit 0 = DAC0, bit 1 DAC1, etc.
  2. Write the symbol length, guard band length, and symbol type registers.
    • SetTDDRTSSlot 0 1000 0x01f: guard band 0, symbol length 1000, half DL, half UL.
  3. At this stage, the channels selected in step 1 are operating in TDD mode.
  4. An immediate trigger can be issued.
  5. To stop the TDD RTS pin assertion/deassertion, SetTDDRTSPinCtrl 10x0000

The following figure shows a representation of the frames in the DAC example.

Figure 1. DAC Example Frames and Symbols Representation

Dual ADC Example

  1. Write the symbol length, guard band length, and symbol type registers.
    • SetTDDRTSSlot 0 1000 0x01f: guard band 0, symbol length 1000, half DL, half UL.
  2. Write 1 into the ADC TDD mode pin register.
    • SetTDDRTSPinCtrl 0 0x0030 enables the TDD on ADC tile 1 channel 0 for dual ADC.
    • As the ADC is a dual ADC, the two TDD RTS pins need to be driven High.
  3. At this stage, the channels selected in step 1 are operating in TDD mode.
  4. To set up an ADC trigger on a specific frame and symbol:
    • Write symbol and frame trigger registers.
      • SetTDDRTSTrigSlot 5 5.
      • SetTDDRTSTrigSlot symbol frame.
    • Write 1 in the corresponding bit of the enable register.
      • SetTDDRTSEnables 0x0002.
      • This controls the hw_trigger_en pins. In this example, it enables the trigger on tile 1.
    • Write 1 in the trigger register.
      • SetTDDRTSTrig 1.
      • This controls the hw_trigger pins.