Other Notes - 2025.1 English

Vitis Unified Software Platform Documentation: Embedded Software Development (UG1400)

Document ID: UG1400
Release Date: 2025-05-29
Version: 2025.1 English

Getting Started with Vitis
Navigating Content by Design Process
Vitis Software Platform Installation
Installing the Vitis Software Platform
Getting Started with the Vitis Software Platform
Vitis Unified Software Platform Overview
Vitis Software Development Workflow
Workspace Structure in the Vitis Software Platform
Migrating from the Classic Vitis IDE to Vitis Unified IDE
Standalone Application Component Migration Details
Unified IDE Features versus Classic IDE Features
Using the Vitis Unified IDE
Launching the Vitis Unified IDE
Vitis Unified IDE Launch Options
Vitis Unified IDE View and Features
Vitis Explorer View
Deep JSON Based Component Display
Search View
Source Control
Files required for Source Control
Source Control
Add New File for Source Control
Add Components for Source Control
Commit the Changes
Push the Project to the Remote Repository
Relative Path Support
Debug View
Example View
Code View and Smart Editor
Issue and source code cross-probing
Problem View
Parallel Compiling
Notification for File Change
New Feature Preview
Workspace Journal
External Lopper Support
Extensions
Serial Monitor
Segmented Configuration
Preferences
Settings
Keyboard Shortcuts, Command Palette, and Quick Find
Develop
Managing Platforms and Platform Repositories
Target Platform
Creating a Hardware Design (XSA File)
Creating a Platform Component from XSA
Customizing a Pre-Built Platform
Adding a Domain to an Existing Platform
Configuring a Domain
Domain Overview Page
Board Support Package Settings Page
Switching FSBL Targeting Processor
Modifying Source Code for FSBL
Modifying the Domain Sources (Driver and Library Code)
Creating a Software Repository
Adding the Software Repository
Resetting BSP Sources for a Domain
Updating the Hardware Specification
Reading Hardware Specification
Applications
Creating application component
Creating an Application Component from Examples
Creating an Application Component
Creating a System Project
Managing Multiple Applications in a System Project Component
Building Projects
Build Configuration Settings
Manage Source Code
Adding Symbols or Definitions
Adding Libraries and Library Paths
Specifying the Linker Options
Specifying Debug and Optimization Compiler Flags
Specifying Miscellaneous Compiler Flags
Linker Scripts
Reset Linker Script for an Application
Manually Adding the Linker Script
Modifying a Linker Script
Building the Application Component
Reading ELF Disassembly
Creating a Library Project
Using Custom Libraries in Application Projects
Run, Debug, and Optimize
Launch Configurations
Main Page
Application Part
Target Connections
Creating a New Target Connection
Setting Custom JTAG Frequency
Establishing a Target Connection
Running the Application Component
Debugging Application Component
Starting Debug
Debugging Standalone Application Component
Debugging Linux Application Component
Debugging Standalone Application Component on QEMU
Setting Conditional Breakpoints
Viewing Disassembly Code
Viewing Memory
Viewing the Value of a Certain Memory address
Comparing the Memory Value of Two Addresses
Freezing Memory Value
Viewing Registers
Exporting Registers from the Vitis IDE
Using Virtual UART Terminal
Debugging an Application Component Already Running On a Target Device
Source Code Remap
Debugging an Application on the Emulator (QEMU)
Running and Debugging Application Components under a System Project Together
Debugging on a Remote Board
OS Aware Debugging
Xen Aware Debugging
Debugging Self-Relocating Programs
Debugging an Application Project Using the Emulator (Command-Line Flow)
Export Memory Function
Cross-Triggering
Enable Cross-Triggering
Cross-Triggering in Zynq Devices
Cross-Triggering in Zynq UltraScale+ MPSoCs
Cross-Triggering in Versal Devices
Use Cases
FPGA to CPU Triggering
PTM to CPU Triggering
CPU to CPU Triggering
XSDB Cross-Triggering Commands
Profile/Analyze
TCF Profiling
gprof Profiling
Non-Intrusive Profiling for MicroBlaze Processors
FreeRTOS Analysis using STM
Creating a Boot Image
Programming Flash
Multi-Cable and Multi-Device Support
Authenticated Jtag Access
XEN Aware Debug
User Managed Mode
Setting User Tool Chain
Vitis Utilities
Software Debugger
Program Device
Vitis Terminal
Project Export and Import
Generating Device Tree
Vitis Python API
Python Vitis Commands
Python API: A command-line tool for creating and managing projects in Vitis
Managing Vitis IDE Components through Python APIs
System Project
Python XSDB Commands
Python XSDB Usage Examples
XSDB Command Usage
XSCT to Python API migration
app
bsp
createdts
domain
getaddrmap
getperipherals
getprocessors
getws
lscript
platform
repo
setws
sysproj
importprojects
importsources
library
GNU Compiler Tools
Overview
Compiler Framework
Common Compiler Usage and Options
Usage
Input Files
Output Files
File Types and Extensions
Libraries
Language Dialect
Commonly Used Compiler Options: Quick Reference
General Options
Library Search Options
Header File Search Option
Default Search Paths
Library Search Procedures
Header File Search Procedures
Initialization File Search Procedures
Linker Options
Memory Layout
Reserved Memory
I/O Memory
User and Program Memory
Object-File Sections
Linker Scripts
MicroBlaze Compiler Usage and Options
MicroBlaze Compiler
Processor Feature Selection Options
General Program Options
Application Execution Modes
Position Independent Code
MicroBlaze Application Binary Interface
MicroBlaze Assembler
MicroBlaze Linker Options
MicroBlaze Linker Script Sections
Tips for Writing or Customizing Linker Scripts
Startup Files
First Stage Initialization Files
Second Stage Initialization Files
Other Files
Modifying Startup Files
Reducing the Startup Code Size for C Programs
Compiler Libraries
Thread Safety
Command Line Arguments
Interrupt Handlers
Arm Compiler Usage and Options
Usage
Other Notes
C++ Code Size
C++ Standard Library
Position Independent Code (Relocatable Code)
Other Switches and Features
Embedded Design Tutorials
Drivers and Libraries
Additional Resources and Legal Notices
Finding Additional Documentation
Support Resources
References
Revision History
Please Read: Important Legal Notices

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