Description
Schedule (syn.schedule.* / config_schedule)
Controls dataflow channel types and FIFO sizing for task-level pipelining regions.
Syntax
| Option | Config File | Tcl | Default | Description |
|---|---|---|---|---|
| enable_dsp_full_reg | syn.schedule.enable_dsp_full_reg=<bool> | config_schedule -enable_dsp_full_reg <bool> | 1 (true) | Specifies that the DSP signals should be fully registered. When true, registers both input and output of DSP48 blocks for timing closure. Disabling may reduce latency at cost of timing. |
Usage
ini
[hls]
syn.schedule.enable_dsp_full_reg=true
tcl
config_schedule -enable_dsp_full_reg true
Example
tcl
config_schedule -enable_dsp_full_reg=false