Mapping Direct I/O Streams to a Wire Interface - 2024.2 English - UG1399

Vitis High-Level Synthesis User Guide (UG1399)

Document ID
UG1399
Release Date
2024-11-13
Version
2024.2 English

Direct I/O streams offer a flexible interface with the hardware (HW) wire interface. By choosing the appropriate protocol Port-Level I/O: Wire Handshakes — ap_ack, ap_vld, ap_none, or ap_hs, you can manage data flow, validation, and acknowledgment signals effectively.

Protocol Options for Direct I/O Streams

AP_HS

Interface mode ap_hs includes a two-way handshake signal with the data port, adhering to the industry-standard valid and acknowledge handshake. The signals associated with the ap_hs protocol are:

  • Data Port: Access data with <var>.read().
  • Valid Signal: Check data validity with <var>.valid(), which returns true when data is ready for reading.
  • Acknowledge Signal: Confirm data reception with <var>.ready(), which returns true after the data has been read.

AP_VLD

The ap_vld protocol, a simpler version of ap_hs, provides:

  • Data port: "<var>.read()"
  • Valid signal: "<var>.valid()" to indicate when the data signal is valid and can be read.

Example kernel function utilizing ap_vld:

void krnl_stream_vdatamover(hls::stream<pkt> &in,
                      hls::stream<pkt> &out,
                                int mem[DATA],
                      hls::ap_vld<int> &reset_value,
                      hls::ap_vld<int> &reset_myCounter
                      )
 
 
{for(int i=0;i<DATA;i++)
{
// ...
  if(reset_myCounter.valid())    {     
      int reset = reset_myCounter.read();
    //...   
}
 // .. 
}
}

AP_ACK

The ap_ack port-level I/O protocol is a subset of the ap_hs interface type. The ap_ack port-level I/O protocol provides the following signals:

  • Data Port: Access data with <var>.read().
  • Acknowledge Signal: Indicate data consumption with <var>.ready().

AP_NONE

The ap_none port-level I/O protocol is the simplest interface type and has no other signals associated with it. Neither the input nor output data signals have associated control ports that indicate when data is read or written. The only ports in the RTL design are those specified in the source code.

Note: AP_NONE protocol does not have non-blocking APIs.
typedef hls::ap_none<int> mystream_in;
typedef hls::ap_none<int> mystream_out;
typedef hls::ap_none<int> stream_vld_in;
typedef hls::ap_none<int> stream_vld_out;
 
 
void addInputs(mystream_in &in, mystream_in &dinB,stream_vld_in&vldIn,mystream_out &dout_Y,stream_vld_out & vldOut)
{
    #pragma HLS pipeline II=1
    int var = vldIn.read();
    if(var ==0)
    {
        vldOut.write(var);
        return;
    }
    int tmp1 = in.read(); // Blocking_read
    int tmp2 = dinB.read(); // Blocking read
    int out = tmp1+ tmp2;
    dout_Y.write(out);
    vldOut.write(1);
}