Compile Options - Compile Options - 2026.1 English - UG1399

Vitis High-Level Synthesis User Guide (UG1399)

Document ID
UG1399
Release Date
2026-06-23
Version
2026.1 English

The syn.compile commands specify the default behavior for compilation of the HLS component.

syn.compile.design_size_max_warning
Specifies the design size that triggers a warning related to slow compilation or poor QoR.
syn.compile.design_size_maximum_warning=300000
syn.compile.enable_auto_rewind
When set to true, enables an alternative HLS implementation for pipelined loops that uses automatic loop rewind. See the section of the Rewinding Pipelined Loops for Performance in the Vitis High-Level Synthesis User Guide (UG1399) for additional information.
syn.compile.enable_auto_rewind=1
syn.compile.ignore_long_run_time
Disables the long runtime warning.
syn.compile.ignore_long_run_time=1
syn.compile.name_max_length <arg>
Specifies the maximum length of function names. If the length is over the threshold, the system truncates the last part of the name.
syn.compile.name_max_length=13
syn.compile.no_signed_zeros
The no_signed_zeros option ignores the signedness of floating point zero. By ignoring the signedness, the compiler can perform aggressive optimizations on floating point operations.
syn.compile.no_signed_zeros=1
syn.compile.performance_budgeter

By enabling this option, the top-level performance pragma conducts a comprehensive, design-wide performance analysis. The analysis considers multiple optimization strategies across the entire design, similar to selecting the most efficient route. This analysis helps identify the best path to meet performance targets.

enable
Activates the performance budget for a comprehensive, design-wide performance analysis.
disable
Deactivates the performance budget, preventing any comprehensive analysis.
auto
Automatically enables design-wide performance analysis if the system detects a performance pragma.
syn.compile.pipeline_flush_in_task arg

Specifies that pipelines in hls::tasks is flushing (flp) by default to reduce the probability of deadlocks in C/RTL Co-simulation. This option applies to pipelines that achieve an II=1 with the default option of ii1. However, you can also specify it as applying always to enable flushing pipelines in either hls::tasks or dataflow, or can be completely disabled using never.

Important: Flushing pipelines (flp) are compatible with the rewind option specified in the PIPELINE pragma or directive when the syn.compile.enable_auto_rewind option is also specified.
always
Always make pipelines flushable in hls::tasks or dataflow regardless of II.
never
Never make pipeline flushable unless specifically overridden by other directives or pragmas.
ii1
Make pipelines that achieve II=1 flushable in hls::tasks. This is the default setting.
syn.compile.pipeline_flush_in_task=always
syn.compile.pipeline_loops arg
This setting ensures the tool automatically pipelines loops with a tripcount equal to or greater than the specified value.
syn.compile.pipeline_loops=20
syn.compile.pipeline_style arg
Set default pipeline style, this is a preference not a hard constraint. Refer to Flushing Pipelines and Pipeline Types in Vitis High-Level Synthesis User Guide (UG1399) for more information. The three styles are: stallable (stp), flushable (flp), and free-running (frp). The default is free-running.
syn.compile.pipeline_style=flp
syn.compile.pragma_strict_mode
Enable errors instead of warnings for unrecognized and improper pragma syntax.
syn.compile.pragma_strict_mode=1
syn.compile.unsafe_math_optimizations
Ignores the signedness of floating point zero and enables associative floating point operations. Allows compiler to do aggressive optimizations on floating point operations.
syn.compile.unsafe_math_optimizations=1
Important: Using this option can change the result of any floating point calculations and result in a mismatch in C/RTL co-simulation. Ensure your test bench is tolerant of differences and checks for a margin of difference, not exact values.
syn.compile_use_csim_directives
Use directives generated by C simulation during C synthesis. Default is false.
syn.compile_use_csim_directives=true