Using VIO Cores - 2024.1 English

Versal Adaptive SoC System Integration and Validation Methodology Guide (UG1388)

Document ID
UG1388
Release Date
2024-06-19
Version
2024.1 English

The Virtual Input/Output (AXIS-VIO) core allows you to monitor and drive internal device signals in real time. Use this core when it is necessary to drive or monitor low speed signals, such as resets or status signals. The AXIS-VIO debug core must be instantiated in the design and can be used in both IP integrator and RTL. The AXIS-VIO core is available in the IP catalog for RTL-based designs and in IP integrator.

For information on customizing the AXIS-VIO core, see the Virtual Input/Output (VIO) with AXI4-Stream Interface LogiCORE IP Product Guide (PG364). For information on taking measurements with an AXIS-VIO core, see this link in the Vivado Design Suite User Guide: Programming and Debugging (UG908).