In some instances, a balanced clock tree does not provide the optimal
performance for a design. To maximize SLR crossing performance in stacked silicon
interconnect (SSI) technology devices, a smaller clock insertion delay at the clock
region boundary above and below the SLR crossings can be traded off with higher clock
skew to the other clock region rows. This has the benefit of achieving the maximum SLR
crossing performance. The Vivado placer supports
user selectable as well as automatic optimization of clock trees for SSI technology
Versal devices. The CLOCK_VTREE_TYPE property on
a clock net indicates the vertical tree (V-tree) type that the placer selected for a
clock net. For Versal SSI technology devices, the
placer default V-tree type is balanced
. You can change
the default V-tree type with the -clock_vtree_type
placer switch. You can also specify the V-tree type on a per-clock net basis using the
USER_CLOCK_VTREE_TYPE property. The following table shows the user-selectable V-tree
types that are available with different optimizations.
V-Tree Type | Optimization Criteria | Property Value |
---|---|---|
Inter-SLR | Maximize SLR crossing performance | interSLR |
Intra-SLR | Minimize skew within SLRs | intraSLR |
Balanced | Minimize skew across SLRs (default) | balanced |
The following figure shows the difference in V-tree routing for a balanced
and an interSLR
optimized V-tree for a two-SLR SSI technology device. The clock is routed on the
vertical route shown in dark blue to the clock root shown in yellow. From there, the
V-tree is constructed via dedicated routing through switch boxes shown in orange. The
image on the left shows the clock routing for a balanced template where skew is
minimized by matching insertion delay to each clock region row. The image on the right
shows how the clock routing delay (green arrows) is minimized to clock regions rows Y4
and Y5 below and above the SLR boundary to maximize SLR crossing performance.
The default balanced
V-tree provides the best
performance for the majority of designs. However, when SLR crossing performance must be
maximized, use the interSLR
optimized V-tree. The
Vivado tools can automatically determine the
optimal V-tree when you specify the Explore
or AggressiveExplore
placer directive. You can also specify
the V-tree type by using the USER_CLOCK_VTREE_TYPE property, as shown in the following
example:
set_property USER_CLOCK_VTREE_TYPE interSLR [get_nets -of [get_pins BUFGCE_inst/O]]