References - 2025.1 English - UG1388

These documents provide supplemental material useful with this guide:

1. Versal Adaptive SoC Clocking Resources Architecture Manual (AM003)
2. Versal Adaptive SoC Technical Reference Manual (AM011)
3. Versal Adaptive SoC Packaging and Pinouts Architecture Manual (AM013)
4. Versal Adaptive SoC NoC and Integrated Memory Controller NPI Register Reference (AM019)
5. Versal AI Edge Series Gen 2 and Prime Series Gen 2 Technical Reference Manual (AM026)
6. Versal Adaptive SoC CIPS Verification IP Data Sheet (DS996)
7. AXI Verification IP LogiCORE IP Product Guide (PG267)
8. Versal Adaptive SoC Programmable Network on Chip and Integrated Memory Controller LogiCORE IP Product Guide (PG313)
9. Versal Adaptive SoC Transceivers Wizard LogiCORE IP Product Guide (PG331)
10. Versal Adaptive SoC Integrated Block for PCI Express LogiCORE IP Product Guide (PG343)
11. Versal Adaptive SoC DMA and Bridge Subsystem for PCI Express Product Guide (PG344)
12. Versal Adaptive SoC CPM Mode for PCI Express Product Guide (PG346)
13. Versal Adaptive SoC CPM DMA and Bridge Mode for PCI Express Product Guide (PG347)
14. Virtual Input/Output (VIO) with AXI4-Stream Interface LogiCORE IP Product Guide (PG364)
15. Performance AXI Traffic Generator Product Guide (PG381)
16. Programmable Network on Chip (NoC2) LogiCORE IP Product Guide (PG406)
17. Integrated DDR5/LPDDR5/5X Memory Controller LogiCORE IP Product Guide (PG456)
18. Vivado Design Suite Tcl Command Reference Guide (UG835)
19. Versal Adaptive SoC PCB Design User Guide (UG863)
20. Vivado Design Suite User Guide: Logic Simulation (UG900)
21. Vivado Design Suite User Guide: Synthesis (UG901)
22. Vivado Design Suite User Guide: Using Constraints (UG903)
23. Vivado Design Suite User Guide: Implementation (UG904)
24. Vivado Design Suite User Guide: Design Analysis and Closure Techniques (UG906)
25. Vivado Design Suite User Guide: Power Analysis and Optimization (UG907)
26. Vivado Design Suite User Guide: Programming and Debugging (UG908)
27. Vivado Design Suite User Guide: Dynamic Function eXchange (UG909)
28. Vivado Design Suite Properties Reference Guide (UG912)
29. UltraFast Design Methodology Guide for FPGAs and SoCs (UG949)
30. Vivado Design Suite User Guide: Designing IP Subsystems Using IP Integrator (UG994)
31. AI Engine Tools and Flows User Guide (UG1076)
32. AI Engine Kernel and Graph Programming Guide (UG1079)
33. Versal Adaptive SoC Design Guide (UG1273)
34. Versal Adaptive SoC System Software Developers Guide (UG1304)
35. Versal Adaptive SoC Hardware, IP, and Platform Development Methodology Guide (UG1387)
36. Vitis High-Level Synthesis User Guide (UG1399)
37. Vitis Embedded Software Development Flow Documentation (UG1400)
38. Vitis Unified Software Platform Documentation Landing Page (UG1416)
39. Versal Adaptive SoC System and Solution Planning Methodology Guide (UG1504)
40. Versal Adaptive SoC Board System Design Methodology Guide (UG1506)
41. SmartLynq+ Module User Guide (UG1514)
42. AI Engine-ML Kernel and Graph Programming Guide (UG1603)
43. Data Center Acceleration using Vitis (UG1700)
44. Embedded Design Development Using Vitis (UG1701)
45. Vitis Reference Guide (UG1702)
46. Software Debugger Reference Guide (UG1725)
47. Simulating FPGA Power Integrity Using S-Parameter Models (WP411)
48. Simplified Power Sequencing Application Note (XAPP1375)
49. Designing Heatsinks and Thermal Solutions for Xilinx Devices (XAPP1377)