Power Timing Slack - Power Timing Slack - 2026.1 English - UG1388

Versal Adaptive SoC System Integration and Validation Methodology Guide (UG1388)

Document ID
UG1388
Release Date
2026-07-22
Version
2026.1 English

You can use a concurrent timing and power closure strategy to achieve a more efficient design process by comparing multiple implementation runs. Varying place and route directives and subdirectives across runs helps identify the solution that best satisfies both timing and power goals.

The following figure shows the results from an example application using this approach. A total of 64 timing‑closure runs were executed and plotted together. Of these runs, 36 runs met timing requirements. From a power perspective, the total power budget is 77 W. Across the 64 runs, total power ranged from 75 W to 83 W, representing an 8 W (approximately 10%) variation. Although this example demonstrates noticeable power variability across runs, the range of variability is design dependent.

From a timing‑only perspective, run 6 achieved the best results but had an estimated power of 79.5 W, exceeding the total power budget. Among the clean timing runs, run 13 delivered the lowest power consumption at 75 W while still meeting timing requirements. Evaluating the design from both timing and power perspectives enables you to select the optimal implementation without compromising timing. In this example, that approach resulted in a 4 W power savings.

Power Tip: You can also improve design power by removing the DONT_TOUCH constraint to allow upfront logic trimming, including clocking primitives.
Figure 1. Power and Timing Slack for Different Place and Route Runs
X25400-timing-power Sheet.1 Process.509 Standard Arrow.510 Process.509.4 Best Run: Power Budget Exceeded Best Run:Power Budget Exceeded Process.6 Process.7 Lowest Power: Still Timing Clean Lowest Power:Still Timing Clean Standard Arrow.8 Sheet.9 X25400-060421 X25400-060421