For help debugging the DDR memory controller interface, see this link in the Versal Adaptive SoC Programmable Network on Chip and Integrated Memory Controller LogiCORE IP Product Guide (PG313) or this link in the Integrated DDR5/LPDDR5/5X Memory Controller LogiCORE IP Product Guide (PG456). When debugging a hardware-related issue, see this link in the Versal Adaptive SoC PCB Design User Guide (UG863) to ensure the memory interface meets the layout guidelines. When working on a DDR memory controller calibration error, use the smallest design possible for the hardware, which is typically a CIPS/PS Wizard instance and the single NoC DDR memory controller that you are debugging. To move past a calibration error, try to reduce the memory interface frequency or enable 2T/2N timing for DDR4 under the DDR Advanced tab.
Because the Versal device DDR memory controller has a different set of limitations for generating a valid pinout, you must make sure a pinout was generated by following the Obtaining and Verifying Versal Adaptive SoC Memory Pinouts Tutorial. If you plan to increase the memory density in the future when using a hardware design and generating a pinout for the Versal device, see this link in the Versal Adaptive SoC Programmable Network on Chip and Integrated Memory Controller LogiCORE IP Product Guide (PG313) or this link in the Integrated DDR5/LPDDR5/5X Memory Controller LogiCORE IP Product Guide (PG456).
If there are post-calibration data errors with the DDR memory controller, use the Versal Adaptive SoC DDR Memory Controller - 2D Eye Scan Tutorial. This tool generates a plot of the 2D data valid window on a per nibble basis for the memory interface. If the data valid window is small or has an anomalous shape, this might indicate a PCB layout or power issue. For PCB layout or power issues, try operating the interface at a lower data rate to see if the rate of data errors decreases or goes away entirely. Enabling 2T/2N timing can also help if this option was not already enabled in the original hardware design. You can run the 2D Eye Scan one time to get a baseline, and then run the 2D Eye Scan again after enabling 2T/2N timing and lowering the data rate to determine whether the data valid window size improves.