Debugging - 2024.1 English

Versal Adaptive SoC System Integration and Validation Methodology Guide (UG1388)

Document ID
UG1388
Release Date
2024-06-19
Version
2024.1 English

In-system debugging allows you to debug your design in real time on your target device. This step is needed if you encounter situations that are extremely difficult to replicate in a simulator.

For debug, you provide your design with special debugging IP that allows you to observe and control the design. After debugging, you can remove the instrumentation or special IP to increase performance and logic reduction.

Debugging a design is a multistep, iterative process. Like most complex problems, it is best to break the design debugging process down into smaller parts by focusing on getting smaller sections of the design working one at a time rather than trying to get the whole design to work at once.

Though the actual debugging step comes after you have successfully implemented your design, AMD recommends planning how and where to debug early in the design cycle. You can run all necessary commands to perform programming of the devices and in-system debugging of the design from the Program and Debug section of the Flow Navigator in the Vivado IDE.

Following are the debug steps:

  1. Probing: Identify the signals in your design that you want to probe and how you want to probe them.
  2. Implementing: Implement the design that includes the additional debug IP attached to the probed nets.
  3. Analyzing: Interact with the debug IP contained in the design to debug and verify functional issues.
  4. Fixing phase: Fix any bugs and repeat as necessary.

For more information, see the Vivado Design Suite User Guide: Programming and Debugging (UG908).

Tip: To create your own debug application using Python API, AMD provides the open source ChipScoPy API that enables high-level control of the Versal device debug IP running in hardware. Using a simple Python API, you can control and communicate ChipScopeā„¢ debug such as the Integrated Logic Analyzer (ILA), Virtual Input/Output IO (VIO), device memory access, and more. For more information, see the GitHub repository at http://www.github.com/Xilinx/chipscopy.