Vitis HLS generates the hardware design from C/C++ source code. Therefore, AMD recommends Vitis HLS for software developers who need to create PL blocks in a Versal adaptive SoC project.
Writing C/C++ for hardware differs from writing C/C++ for software. Versal devices have different underlying architectures compared to CPUs or GPUs. Therefore, it is important to use programming patterns optimized for Versal devices. The producer-consumer pattern is especially well-suited for Versal device programming.
Refer to this link in the Vitis High-Level Synthesis User Guide (UG1399) if you are not familiar with this concept. The guide also helps if you are unfamiliar with data streaming and pipelining.