AMD recommends inferring the memory and the output registers in a single level of hierarchy. This method ensures inference is as intended. There are two scenarios that infer a block RAM output register.
The first one is when an extra register exists on the output. The second is when the read address register is retimed across the memory array. This can only happen using single port RAM. This is shown below:
Figure 1. RAM with Extra Read Register for Block RAM Output Register Inference
Figure 2. View of RAM Before Address Register Retiming
Certain deviations from these examples can prevent the inference of the output register.