To activate reconfigurable module (RM) logic out of reset after reconfiguration, the reset process should follow these guidelines:
- Build safe state machines with a recovery
mechanism.
Critical Warning [Synth 8-12595] is flagged if Onehot encoded FSM is not having reset. This can cause incorrect behavior. You should consider using FSM_SAFE_STATE attribute on the register. - Events should be coordinated using an end of sequence (EOS) that signals when configuration is complete. Enable the EOS signal from CIPS and use it to manage Reset events and control the release of Decoupling.
- For any IP that can be placed in a RM, consider these compatibility checks:
- Can all synchronous logic be initialized via level-sensitive reset?
- Are there elements that cannot be initialized? Any Non-resettable Primitives?
- What inputs are critical to block to avoid internal corruption?
For more information on RM initialization requirements, see the Vivado Design Suite User Guide: Dynamic Function eXchange (UG909).