To activate reconfigurable module (RM) logic out of reset after reconfiguration, the reset process must follow these guidelines:
- Build safe state machines with a recovery
mechanism.
Critical Warning [Synth 8-12595] is flagged if Onehot encoded FSM is not having reset. This can cause incorrect behavior. You should consider using FSM_SAFE_STATE attribute on the register. - Coordinate events using an end of sequence (EOS). The EOS signals when configuration is complete. Enable the EOS signal from CIPS and use it to manage Reset events and control the release of Decoupling.
- Consider these compatibility checks for any IP that you can be place in a
RM:
- Can a level-sensitive reset initialize all synchronous logic?
- Is any element impossible to initialize? Any Non-resettable Primitives?
- What inputs are critical to block to avoid internal corruption?
For more information on RM initialization requirements, refer to the Vivado Design Suite User Guide: Dynamic Function eXchange (UG909).