Reconfigurable Module Internal Clock Nets - Reconfigurable Module Internal Clock Nets - 2026.1 English

Reconfigurable Module Internal Clock Nets - Reconfigurable Module Internal Clock Nets - 2026.1 English - UG1387

Versal Adaptive SoC Hardware, IP, and Platform Development Methodology Guide (UG1387)

Document ID

UG1387

Release Date

2026-07-22

Version

2026.1 English

In a reconfigurable module (RM) internal clock net, place the clock root at the center of the loads inside the reconfigurable partition (RP) Pblock. This clock root placement offers more flexibility for placement and routing of the RM internal clock in subsequent implementations. AMD recommends this approach whenever possible to achieve better skew and optimal clock root placement.