Recommended Constraints Sequence - Recommended Constraints Sequence - 2026.1 English - UG1387

Versal Adaptive SoC Hardware, IP, and Platform Development Methodology Guide (UG1387)

Document ID
UG1387
Release Date
2026-07-22
Version
2026.1 English

The constraints language (XDC) uses Tcl syntax and interpretation rules. Like Tcl, XDC is a sequential language:

  • Define variables before using them. Similarly, you must define timing clocks before you can use them in other constraints.
  • For equivalent constraints that cover the same paths and have the same precedence, the last one applies.
  • When multiple timing exceptions cover a path, the constraint with the higher precedence applies.

When considering the priority rules above, the timing constraints must overall use the following sequence:

## Timing Assertions Section
# Primary clocks
# Virtual clocks
# Generated clocks
# Delay for external MMCM/PLL feedback loop
# Clock Uncertainty and Jitter
# Input and output delay constraints
# Clock Groups and Clock False Paths
## Timing Exceptions Section
# False Paths
# Max Delay / Min Delay
# Multicycle Paths
# Case Analysis
# Disable Timing

When you use multiple XDC files, pay particular attention to the clock definitions. Validate that you order the dependencies correctly.

You can locate the physical constraints anywhere in any constraint file.