In the platform-based design flow, the hardware design is conceptually divided in two distinct elements: the platform and the processing system. The platform contains Versal IP blocks such as:
- CIPS/PS Wizard
- NoC
- AI Engine
- Clocking Wizard
- Board interface IP blocks (including high-speed I/Os and memory controllers)
The processing system contains the application-specific part of the system and can be composed of both programmable logic and AI Engine blocks. The platform is considered extensible, because the platform does not contain the entirety of the programmable logic content. Instead, the processing system extends the platform.
Following are the main steps in this flow. You can complete the first three steps in parallel. After finalizing the fixed hardware platform, you can update the AI Engine program independently.
- Develop the hardware platform using the Vivado IP integrator and RTL code.
- Develop the AI Engine graph and kernels
using the Vitis tools.Note: The AI Engine is only available if you are using the Versal AI Core and AI Edge Series or Versal Premium with AI Engine.
- Develop the PL kernels using the Vitis tools (C++ kernels) or the Vivado tools (RTL kernels).
- Assemble the AI Engine program and the PL kernels to form the processing system. Then, integrate the processing system with the platform using the Vitis linker to create a fixed hardware design.
- Implement and perform design closure on the fixed hardware design using the Vivado tools.
- Develop the software application on top of the fixed hardware design using the Vitis embedded software development flow.
Note: The Vivado IP integrator is supported in Project Mode only.
Important: This is the only
flow that supports programming of the AI Engine
cores and is therefore required for Versal
AI Core, AI Edge, or Premium devices with AI Engine.
Tip:
AMD provides off-the-shelf platforms for Versal adaptive SoC evaluation kits, such as the VCK190.