Placement Analysis - Placement Analysis - 2026.1 English - UG1387

Use the timing summary report after placement to check the critical paths.

• Paths with large negative setup time slack can require checking the constraints for completeness and correctness. Logic restructuring can be necessary to achieve timing closure.
• Paths with large negative hold time slack are most likely due to incorrect constraints or bad clocking topologies. You must fix these paths before moving on to route design.
• Paths with small negative hold time slack are likely to be fixed by the router. You can also run report_clock_utilization after place_design to view a report that breaks down clock resource and load counts by clock region.

For more information, refer to this link in the Versal Adaptive SoC System Integration and Validation Methodology Guide (UG1388). For more information on placement, refer to this link in the Vivado Design Suite User Guide: Implementation (UG904).