Identifying the Clocks Related to Each Port - Identifying the Clocks Related to Each Port - 2026.1 English - UG1387

Versal Adaptive SoC Hardware, IP, and Platform Development Methodology Guide (UG1387)

Document ID
UG1387
Release Date
2026-07-22
Version
2026.1 English

Identify which clocks relate to each port before you define the I/O delay constraint. You can identify the clocks using the methods described in the following sections.