Example Two - Example Two - 2026.1 English - UG1387

Versal Adaptive SoC Hardware, IP, and Platform Development Methodology Guide (UG1387)

Document ID
UG1387
Release Date
2026-07-22
Version
2026.1 English

Use a combination of min and max delay constraints between the feedthrough ports. Example:

set_max_delay -from [get_ports din] -to [get_ports dout] 10
set_min_delay -from [get_ports din] -to [get_ports dout] 2

This is a simple way to constrain both minimum and maximum delays on the path. Any existing input and output delay constraints on the same ports are also used during the timing analysis. For this reason, this style is not popular.

The system usually optimizes and reports the max delay against the Slow timing corner. It optimizes the min delay in the Fast timing corner. Run a few iterations on the feedthrough path delay constraints. This validate that they are reasonable and can be met by the implementation tools. This is especially important if you place the ports far from each other.