With Versal adaptive SoC platform-based design flow, partition your design between the hardware platform and a subsystem. The hardware platform is created in the Vivado tools, and the subsystem is created and added into the platform by the AMD Vitis™ environment.
To succeed with this design flow, you must identify the sections to include in the platform. You must also identify the sections to incorporate via the Vitis environment. The platform is expected to contain common shared resources. The Vitis environment likely incorporates the specialized components of the design.
Common examples of IP contained in the platform include:
- CIPS/PS Wizard
- NoC interconnect
- Clocking
- Reset
- Interrupt controllers
The Vitis environment accepts several types of design sources, including the following:
- Packaged BD
- Packaged RTL
- HLS C code
- AI Engine kernel code
The following figure shows an example of the platform-based design flow.