Design Planning Considerations for Segmented Configuration - Design Planning Considerations for Segmented Configuration - 2026.1 English - UG1387

Versal Adaptive SoC Hardware, IP, and Platform Development Methodology Guide (UG1387)

Document ID
UG1387
Release Date
2026-07-22
Version
2026.1 English

Segmented Configuration is a solution that enables you to boot the processors in a Versal device and access DDR memory before the programmable logic (PL) is configured. Linux, which is DDR-based software, boots first. The PL can be configured later if needed through any primary or secondary boot device or a DDR image store. The Segmented Configuration feature is intended to present the Versal boot sequence with similar flexibility to configure PL as can be done with Zynq UltraScale+ MPSoCs.

Segmented Configuration is an optional feature for Versal Prime, Versal Premium, Versal HBM, Versal AI Core, and Versal AI Edge Series devices. Versal AI Edge Series Gen 2 and Versal Prime Series Gen 2 devices always have the feature enabled.

This solution uses a standard Vivado tool flow through implementation. The only additional annotation required is identifying NoC path segments. These segments must be included in the initial boot image. It occurs automatically after you set the project property that enables the feature.

Programming image generation (write_device_image) automatically splits the programming images into two PDI files to be stored and delivered separately. The entire PL is dynamic and can be completely reloaded while any operating system and DDR memory access remain active.

Additional considerations can be required depending on the features of Segmented Configuration to be used.

  • Functions implemented completely or partially in programmable logic are not available until the PL load (or reload) is complete. This includes ISP and VCU features in Versal AI Edge Series Gen 2 and Versal Prime Series Gen 2 devices. The system software design must recognize the dynamic nature of this approach. They must ensure communication does not attempt to reach functions that are absent and unable to respond.
  • The PLD PDI controls the PS-PL isolation. Therefore, you do not need to add decoupling logic on the PL boundary.
  • You can dynamically reload the PL. Care must be taken to ensure a consistent boundary between PS and PL domains. This includes the number and type of connections. It also involves the details of the NoC solution for paths crossing that boundary.

    The Vivado tools use a mechanism for extracting and importing a NoC Solution File (.ncr). It conveys details of the NoC from one project to another. A verification tool then compares routed databases to ensure consistency between images.

For more information on Segmented Configuration, including design requirements and a tutorial walk-through, refer to the tutorial available from the AMD Vivado GitHub repository.