Design Planning Considerations for Segmented Configuration - 2024.2 English - UG1387

Versal Adaptive SoC Hardware, IP, and Platform Development Methodology Guide (UG1387)

Document ID
UG1387
Release Date
2024-12-18
Version
2024.2 English

Segmented Configuration is a solution that enables you to boot the processors in a Versal device and access DDR memory before the programmable logic (PL) is configured. This allows DDR-based software like Linux to boot first followed by the PL, which can be configured later if needed via any primary or secondary boot device or through a DDR image store. The Segmented Configuration feature is intended to present the Versal boot sequence with similar flexibility to configure PL as can be done with Zynq UltraScale+ MPSoCs.

This solution uses a standard Vivado tool flow through implementation, with the only additional annotation required being the identification of NoC path segments to be included in the initial boot image. This occurs automatically after the project property enabling the feature has been set. Programming image generation (write_device_image) automatically splits the programming images into two PDI files to be stored and delivered separately. The entire PL is dynamic and can be completely reloaded while any operating system and DDR memory access remain active.

Additional considerations might be required depending on the features of Segmented Configuration to be used.

  • All functions that are completely or partially implemented in programmable logic will not be available until the PL load (or reload) is complete. The design of system software must be aware of the dynamic nature of this approach to ensure no communication is attempted to reach functions that are not currently present and cannot respond.
  • The PS-PL isolation is controlled by the partial PDI. Therefore, you do not need to add decoupling logic on the PL boundary.
  • The PL can be dynamically reloaded, but care must be taken to ensure a consistent boundary between PS and PL domains, from the number and type of connections to the details of the NoC solution for paths crossing that boundary. The Vivado tools use a mechanism for extracting and importing a NoC Solution File (.ncr) to convey details of the NoC from one project to another. A verification tool then compares routed databases to ensure consistency between images.

For more information on Segmented Configuration, including design requirements and a tutorial walk-through, see the Segmented Configuration tutorial available from the AMD Vivado GitHub repository.