After selecting your device, choosing and configuring the IP, and writing the RTL and the constraints, the next step is implementation. Implementation compiles the design through synthesis and place and route, then generates the file for programming the device. The implementation process can have some iterative loops. This chapter describes the various implementation steps, highlights points for special attention, and gives tips and tricks to identify and eliminate specific bottlenecks.
Important: You must regularly validate that synthesis and implementation occur
without errors and with minimal timing violations before adding new blocks or generating
a platform for the AMD Vitis™
tools.
Note: The Vitis environment flow automatically runs the implementation steps. You
can improve timing closure and maximum achievable clock frequency. Do this by applying
the techniques described in this chapter using the Vitis command line options and configuration file. For more information,
refer to the
Vitis
Unified Software Platform
Documentation
.