Design Creation with Block Designs - Design Creation with Block Designs - 2026.1 English - UG1387

The AMD Vivado™ IP integrator enables you to create complex system designs by instantiating and connecting IP blocks from various sources. You can create designs either interactively on a canvas GUI or programmatically through a Tcl programming interface. Following are the primary advantages of creating designs in the IP integrator:

• Construct designs at the interface level to enhance productivity. You can also manipulate them at the port level for precision design adjustments.
• The tool creates designs in a correct-by-construction manner, so its automatic design rule checks (DRCs) can detect issues earlier in the design cycle.
• Automation features that configure and connect blocks save development time.
• Collaboration features, such as block design containers, enable team design and reusability.

In addition, IP integrator provides the following advantages for AMD Versal™ adaptive SoC designs:

• Automatic configuration and connectivity for CIPS/PS Wizard and NoC Versal device-specific blocks.
  Note: You do not need to create your entire design in IP integrator. However, at a minimum, you must create this portion of your design in a block design. The resulting block design can then be instantiated and used with other RTL sources. Advanced capabilities require an IP integrator.
• Versal device transceivers configuration, sharing, and integration in GT-based IP.
• Easier complete design integration for various Versal device domains (PL, PS, AI Engine).
• Seamless interaction with AMD Vitis™ tools allowing export of custom hardware platforms.

The following sections provide best practices and information to help you achieve better results in IP integrator as part of your Versal adaptive SoC design.