Design Constraints - Design Constraints - 2026.1 English - UG1387

Versal Adaptive SoC Hardware, IP, and Platform Development Methodology Guide (UG1387)

Document ID
UG1387
Release Date
2026-07-22
Version
2026.1 English

Design constraints set the requirements the compilation flow must meet for the design to function in hardware. For complex designs, constraints also define guidance for the tools to help with convergence and closure. Not all constraints are used by all steps in the compilation flow. The implementation flow uses physical constraints only during optimization, placement, and routing.

Proper timing constraints are essential because they drive synthesis and implementation algorithms. Over-constraining or under-constraining your design makes timing closure difficult. You must use reasonable constraints that correspond to your application requirements. For more information on constraints, refer to the following resources:

Note: Traditional and platform-based design flows use design constraints in a similar manner. However, platform-based designs require extra attention. This applies to signals crossing the boundary from the static region of the design to the dynamic region of the design. Constraining these signals properly ensures flexibility of the platform and minimizes platform revisions.