Defining Clock Constraints - Defining Clock Constraints - 2026.1 English - UG1387

Versal Adaptive SoC Hardware, IP, and Platform Development Methodology Guide (UG1387)

Document ID
UG1387
Release Date
2026-07-22
Version
2026.1 English

Define clocks first to enable their use by other constraints. The first step in the timing constraint creation flow is identifying where to define clocks and whether to define them as primary or generated clocks.

Important: When defining a clock with a specific name (-name option), you must verify that the clock name is not already used by another clock constraint or an existing auto-generated clock. The Vivado Design Suite timing engine issues a message to warn you when you use a clock name in several clock constraints. This message indicates that the first clock definition is overridden.

Using the same clock name twice causes the loss of the first clock definition. It also removes all constraints that refer to that name and are entered between the two clock definitions. AMD recommends avoiding clock overrides unless they do not affect other constraints and all timing paths remain constrained.