Decomposing Deeper Memory Configurations for Improved Area - Decomposing Deeper Memory Configurations for Improved Area - 2026.1 English - UG1387

Versal Adaptive SoC Hardware, IP, and Platform Development Methodology Guide (UG1387)

Document ID
UG1387
Release Date
2026-07-22
Version
2026.1 English

The Vivado synthesis engine uses a balanced method to decompose user-specified RTL RAM blocks by default. It divides them into several BRAM/URAM primitives. The engine exploits built-in cascade chains. It also uses external multiplexers based on configurations and user requirements. The mentioned approach works well for the majority of the scenarios.

The user RTL RAM size (depth x width) does not divide evenly with primitive sizes. Alternative algorithms can improve the utilization of RAM components in such cases. Setting the RAM_DECOMP attribute to "area" on the user-defined RTL_RAM, instructs the synthesis tool to optimize the area for different primitive sizes.

An example below shows where the RAM_DECOMP attribute is set to “area” and shows area recovery when compared to the default memory decomposition algorithm.

Figure 1. 28Kx768 Memory Configuration

The default algorithm infers 96 URAM288E5 primitives. It decomposes the memory as follows:

  • The base primitive is 32Kx8.
  • 96 parallel structures create a 768 wide bus memory.

The area optimal algorithm infers 77 URAM288E5 primitives. It decomposes the memory as follows:

  • The base primitive is 4Kx72.
  • Cascade seven UltraRAMs to create a 28Kx72 configuration.
  • 11 parallel structures create a 768 wide bus memory.