Decomposing Deeper Memory Configurations for Balanced Power and Clock Frequency - Decomposing Deeper Memory Configurations for Balanced Power and Clock Frequency - 2026.1 English - UG1387

Versal Adaptive SoC Hardware, IP, and Platform Development Methodology Guide (UG1387)

Document ID
UG1387
Release Date
2026-07-22
Version
2026.1 English

Applying the RAM_DECOMP attribute to a memory array maps the memory logic to a wider array of block RAM primitives. When the RAM_DECOMP attribute is applied to a memory array, the memory logic is mapped to a wider array of block RAM primitives. To balance power and clock frequency, you can control cascading using the CASCADE_HEIGHT attribute along with the RAM_DECOMP attribute. This approach requires more address decoding logic. However, it reduces the number of block RAMs enabled for each read operation, thereby reducing power consumption.

For example, the following figure shows a 32x16K memory configuration.

Figure 1. 32x16K Memory Configuration
Generated by Your Tool
If you apply the following attributes:
ram_decomp = "power"
cascade_height = 4

The system infers 16 RAMB36E2 and decomposes the memory as follows:

  • The base primitive is 32x1K.
  • Cascade four block RAMs to create a 32x4K configuration.
  • Four parallel structures create a 16K deep memory.
  • The outputs are multiplexed to generate the output data.
    Figure 2. Generated Structure for 32x16K Memory Configuration Example Using CASCADE_HEIGHT and RAM_DECOMP Attributes

The following RTL code example shows the use of the CASCADE_HEIGHT and RAM_DECOMP attributes.

Figure 3. RTL Code for 32x16K Memory Configuration Using the CASCADE_HEIGHT and RAM_DECOMP Attributes

Applying only the ram_decomp = "power" attribute infers 16 RAMB36E2. The memory is decomposed as follows:

  • The base primitive is 32x1K.
  • Cascade eight block RAMs to create a 32x8K configuration.
  • Two parallel structures create a 16K deep memory.
  • A 2:1 MUX multiplexes the outputs to generate the output data.
    Figure 4. Generated Structure for 32x16K Memory Configuration Using the RAM_DECOMP Attribute

The following RTL code example shows the use of the RAM_DECOMP attribute.

Figure 5. RTL Code for 32x16K Memory Configuration Using the RAM_DECOMP Attribute

If you use only the RAM_DECOMP attribute, the overall power savings is similar to using both the RAM_DECOMP and CASCADE_HEIGHT attributes together. This similarity occurs because only one block RAM is active at a time. Creating a 4-deep cascaded block RAM chain is better for maximum clock frequency when compared to an 8-deep cascaded block RAM chain.

For more information, refer to this link in the Vivado Design Suite User Guide: Synthesis (UG901).