QSFP28 Module Connector

The Alveo accelerator cards host a single 4-lane small form-factor pluggable (QSFP) connector that accept an array of optical modules and copper cables. The connector is housed within a single QSFP cage assembly.

Refer to the section for the FPGA clock sources. The detailed device and QSFP pin connections for the feature described in this section are documented in the XDC file found in the Alveo U50 Product Page.

For additional information about the quad SFF pluggable (28 Gb/s QSFP+) module, see the SFF-8663 and SFF-8679 specifications for the 28 Gb/s QSFP+ at the SNIA Technology Affiliates website: https://www.snia.org/sff/specifications2.

QSFP0

The QSFP0 interface has the high-speed connections to the UltraScale+ device listed in the following table.

Table 1. QSFP0 Interface High-Speed Connections
Signal Name	Direction	Bank	I/O Reference	Pin	Description
SYNCE_CLK_N	Input	131	MGTREFCLK0N_131	N37	REFCLK0 Negative LVDS Signal
SYNCE_CLK_P	Input	131	MGTREFCLK0P_131	N36	REFCLK0 Positive LVDS Signal
CLK_1588_N	Input	131	MGTREFCLK1N_131	M39	REFCLK1 Negative LVDS Signal
CLK_1588_P	Input	131	MGTREFCLK1P_131	M38	REFCLK1 Positive LVDS Signal
QSFP28_0_RX0_N	Input	131	MGTYRXN0_131	J46	Negative Receive Lane 1 Input
QSFP28_0_RX1_N	Input	131	MGTYRXN1_131	G46	Negative Receive Lane 2 Input
QSFP28_0_RX2_N	Input	131	MGTYRXN2_131	F44	Negative Receive Lane 3 Input
QSFP28_0_RX3_N	Input	131	MGTYRXN3_131	E46	Negative Receive Lane 4 Input
QSFP28_0_RX0_P	Input	131	MGTYRXP0_131	J45	Positive Receive Lane 0 Input
QSFP28_0_RX1_P	Input	131	MGTYRXP1_131	G45	Positive Receive Lane 2 Input
QSFP28_0_RX2_P	Input	131	MGTYRXP2_131	F43	Positive Receive Lane 3 Input
QSFP28_0_RX3_P	Input	131	MGTYRXP3_131	E45	Positive Receive Lane 4 Input
QSFP28_0_TX0_N	Output	131	MGTYTXN0_131	D43	Negative Transmit Lane 1 Output
QSFP28_0_TX1_N	Output	131	MGTYTXN1_131	C41	Negative Transmit Lane 2 Output
QSFP28_0_TX2_N	Output	131	MGTYTXN2_131	B43	Negative Transmit Lane 3 Output
QSFP28_0_TX3_N	Output	131	MGTYTXN3_131	A41	Negative Transmit Lane 4 Output
QSFP28_0_TX0_P	Output	131	MGTYTXP0_131	D42	Positive Transmit Lane 1 Output
QSFP28_0_TX1_P	Output	131	MGTYTXP1_131	C40	Positive Transmit Lane 2 Output
QSFP28_0_TX2_P	Output	131	MGTYTXP2_131	B42	Positive Transmit Lane 3 Output
QSFP28_0_TX3_P	Output	131	MGTYTXP3_131	A40	Positive Transmit Lane 4 Output