Card Features

Alveo U50 Data Center Accelerator Card User Guide (UG1371)

Document ID
UG1371
Release Date
2023-06-15
Revision
1.1 English

The AMD Alveo™ U50/U50LV data center accelerator card is PCIe® Gen3 x16 compliant and Gen4 x8 compatible featuring the AMD 16 nm UltraScale+™ technology. It features 8 GB HBM to provide high-performance, adaptable acceleration for memory-bound, compute-intensive applications including database, analytics, and machine learning inference.

The Alveo U50/U50LV accelerator card features are as follows.

Table 1. Alveo U50/U50LV Features
Card Component Alveo U50/U50LV
FPGA UltraScale+ XCU50 FPGA
HBM 8 GB - two 4 gigabyte (GB) HBM memory stacks
Split into 32 256 MB channels
Network Interface 1x QSFP28
Supporting 100 GbE, 40 GbE, or 4x10/25 GbE
PCIe 16-lane PCI Express
PCIe Integrated Endpoint block connectivity
Gen1, 2, or 3 up to x16, Gen4 x8
Single or dual Gen4 x8
I2C Bus
Status LEDs
Power Management Power management with system management bus (SMBus) voltage, current, and temperature monitoring
Electrical Design Power 75W PCIe slot functional with PCIe slot power only
Configuration Options 1 gigabit (Gb) Quad Serial Peripheral Interface (SPI) flash memory
UltraScale+ device configurable over USB/JTAG and Quad SPI configuration flash memory
UART UART access through the maintenance connector
Note: The Alveo U50/U50LV card has separate power rails for FPGA fabric and HBM memory. Developers must ensure their designs do not draw too much power for each rail. The HBM rail has a 10W supply rail budget, and may limit HBM performance (see AR75222). For details on how to monitor power and temperature, see Monitor Card Power and Temperature.