The following table shows the revision history for this document.
| Section | Revision Summary |
|---|---|
| 03/17/2023 Version 1.1 | |
| Models of Boards | Removed ED option. |
| Versal ACAP Kit Numbering | Removed ED option. |
| Board Features and Block Diagram | Added additional bullet to EBM configuration option. Clarified 72-bit (64-bit, and 8-bit ECC) DDR4 feature and updated the block diagram accordingly. |
| Board Component Location | Adjusted 8 and 47 callout position. |
| Board Component Descriptions | Revised Molex part number for J233 and Carlisle part number for J328-J331 reference designators. |
| Jumpers | Revised default for J32 and J35. |
| JTAG | Added FT4232 note and clarified 2-pole DIP SW3[1:2] information for J36 connector. |
| QSPI32 | Added X-EBM-01 SPI flash memory device information. |
| I/O Voltage Rails | Revised voltage for PMC MIO 500, 501, and 502. |
| PMC MIO[42:43] UART0 | Revised port BD UART0 MIO information and changed Versal™ PS UART to Versal PL UART in FT4232HL UART Connections figure. |
| PMC MIO[46:47] I2C0 Bus | Revised I2C0 U3 switch part number. |
| JTAG Chain | Revised SW3, U241, U240, and J36 information and added note in JTAG Chain Block Diagram. |
| Clock Generation | Revised part number for J328-J331 reference designators. |
| Programmable FMCP MGT SI570 Clock with Buffer | Revised programmable oscillator Silicon Labs part number. |
| User I/O | Revised two user pushbuttons and CPU reset switch information. |
| Board Power System | Added important note. |
| Monitoring Voltage and Current | Revised the number of rails from 20 to 19. |
| References | Revised link for Infineon Integrated Circuits. |
| 01/07/2021 Version 1.0 | |
| Initial release. | N/A |