[Figure 1, callout 39]
The VCK190 board has an I2C programmable SI570 low-jitter 3.3V LVDS differential oscillator (U5) connected to the GTY_REFCLK1 inputs of U1 GTY bank 105. The HSDP_SI570_CLK_P and HSDP_SI570_CLK _N series capacitor coupled clock signals are connected to XCVC1902 device U1 pins J39 and J40, respectively. At power-up, this clock defaults to an output frequency of 156.250 MHz. User applications or the System Controller can change the output frequency within the range of 10 MHz to 945 MHz through the I2C bus interface. Power cycling the VCK190 board reverts this user clock to the default frequency of 156.250 MHz.
- Programmable oscillator: Silicon Labs SI570BAB000544DG (10 MHz-945 MHz range, 156.250 MHz default)
- I2C address
0x5D
- LVDS differential output, total stability: 61.5 ppm