[Figure 1, callout 1]
The GTY transceivers in the XCVC1902 device U1 are grouped into four channels or quads. The XCVC1902 has four GTY quads (GTYs 103-106) on the right side of the device and seven GTY quads (GTYs 200-206) on the left side of the device.
The VCK190 board provides access to 11 of the 11 GTY quads as shown in the GTY map in the following table.
| VCK190 XC10S80 VSVA2197 GTY Mapping | |||||||||
|---|---|---|---|---|---|---|---|---|---|
| HDMI_TX_CLK_LVDS (TX only) | ch3 | GTYT_S Quad 106 | GTYT_S Quad 206 | ch3 | FMC2 DP11 | ||||
| HDMI Lane 2 | ch2 | ch2 | FMC2 DP10 | ||||||
| HDMI Lane 1 | ch1 | ch1 | FMC2 DP9 | ||||||
| HDMI Lane 0 | ch0 | ch0 | FMC2 DP8 | ||||||
| HDMI_9T49N241_CLK | refclk1 | refclk1 | FMC2_GBTCLK2 | ||||||
| HDMI_RX_CLK | refclk0 | refclk0 | SI570_8A34001_MUX_BUF3 | ||||||
| SFP1 | ch3 | GTYT_M Quad 105 | PCIe | PCIe | GTYT_S Quad 205 | ch3 | FMC2 DP7 | ||
| SFP0 | ch2 | ch2 | FMC2 DP6 | ||||||
| None | ch1 | ch1 | FMC2 DP5 | ||||||
| HSDP (USB-C) | ch0 | ch0 | FMC2 DP4 | ||||||
| HSDP SI570 CLK | refclk1 | refclk1 | FMC2_GBTCLK1 | ||||||
| zSFP SI570 CLK | refclk0 | refclk0 | SI570_8A34001_MUX_BUF2 | ||||||
| PCIe Lane 7 | ch3 | GTYB_M Quad 104 | PCIe | MRMAC | GTYB_S Quad 204 | ch3 | FMC2 DP3 | ||
| PCIe Lane 6 | ch2 | ch2 | FMC2 DP2 | ||||||
| PCIe Lane 5 | ch1 | ch1 | FMC2 DP1 | ||||||
| PCIe Lane 4 | ch0 | ch0 | FMC2 DP0 | ||||||
| None | refclk1 | refclk1 | FMC2_GBTCLK0 | ||||||
| PCIe Slot Clock 0 (buffered) | refclk0 | refclk0 | SI570_8A34001_MUX_BUF1 | ||||||
| PCIe Lane 3 | ch3 | GTYT_S Quad 103 | CPMG4 | MRMAC | GTYT_M Quad 203 | ch3 | FMC1 DP11 | ||
| PCIe Lane 2 | ch2 | ch2 | FMC1 DP10 | ||||||
| PCIe Lane 1 | ch1 | ch1 | FMC1 DP9 | ||||||
| PCIe Lane 0 | ch0 | ch0 | FMC1 DP8 | ||||||
| NONE | refclk1 | refclk1 | FMC1_GBTCLK2 | ||||||
| PCIe Slot Clock 0 (buffered) | refclk0 | refclk0 | None | ||||||
| CPMG4 | PCIe | GTYB_M Quad 202 | ch3 | FMC1 DP7 | |||||
| ch2 | FMC1 DP6 | ||||||||
| ch1 | FMC1 DP5 | ||||||||
| ch0 | FMC1 DP4 | ||||||||
| refclk1 | FMC1_GBTCLK1 | ||||||||
| refclk0 | None | ||||||||
| MRMAC | GTYT_S Quad 201 | ch3 | FMC1 DP3 | ||||||
| ch2 | FMC1 DP2 | ||||||||
| ch1 | FMC1 DP1 | ||||||||
| ch0 | FMC1 DP0 | ||||||||
| refclk1 | FMC1_GBTCLK0 | ||||||||
| refclk0 | SI570_8A34001_MUX_BUF0 | ||||||||
| MRMAC | GTYB_S Quad 200 | ch3 | QSFP4 | ||||||
| ch2 | QSFP3 | ||||||||
| ch1 | QSFP2 | ||||||||
| ch0 | QSFP1 | ||||||||
| refclk1 | IEEE-1588 Clock | ||||||||
| refclk0 | IEEE-1588 Clock | ||||||||
The GTY connections are shown in the following figure.
Figure 1.
VCK190 GTY
Connections
