Running a Bare-Metal Hello World Application - Running a Bare-Metal Hello World Application - 2025.2 English - UG1305

In this example, you will learn how to manage the board settings, make cable connections, connect to the board through your PC, and run a Hello World software application from Arm Cortex-A72 and Arm Cortex-R5F on DDR memory in the Vitis software platform.

You will create a new Vitis project, similar to the one in running-bare-metal-hello-world-application, except that it will use the default linker scripts, which will reference the DDR memory.

1. Manage board settings, make cable connections, and connect to the board through your system and launch the Vitis software platform as discussed in steps 1 through 7 in running-bare-metal-hello-world-application.

   Note

   Create a new Vitis workspace for this. Do not use the workspace created in running-bare-metal-hello-world-application.

2. Create a bare-metal Hello World system project with an application running on Arm Cortex-A72 and modify its source code as discussed in steps 1 and 2 of creating-a-hello-world-application-for-the-arm-cortex-a72-on-ocm and steps 1 and 2 of Modifying the helloworld_a72 Application Source Code.

   Note

   Ensure that the SW1 switch is set to JTAG boot mode as shown in the following figure.

   

3. Select the component (hello_world_a72) application and select Build to generate the project elf files within the Debug folder of the application project.

4. Create an additional RPU domain for your platform (created in Step 2) as discussed in Creating the Standalone Application Project for the Arm Cortex-R5F.

5. Create a bare-metal Hello World application running on Arm Cortex-R5F within the existing system project (Step 2) and modify its source code as discussed in steps 1 and 2 of Creating the Standalone Application Project for the Arm Cortex-R5F and steps 1 and 2 of Modifying the helloworld_r5 Application Source Code.

6. Select the component (hello_world_r5) application and select Build to generate the project elf files within the Debug folder of the application project.

Refer to Running Applications in the JTAG Mode using the System Debugger in the Vitis Software Platform for running the applications built above in JTAG mode using system debugger in the Vitis software platform and to generating-boot-image-for-standalone-application for generating boot images for standalone applications.