Following are the steps to load the application using XSCT.
Run xsct% targets.
The targets command lists the available targets and allows you to select a target through its ID. Target IDs can change from session to session as the targets are assigned IDs as they are discovered on the JTAG chain.
Note
For non-interactive usage such as scripting, the -filter option can be used to select a target instead of selecting the target through its ID.
The targets are listed below:
xsct% target 1 Versal xcvc1902 2 RPU 3 Cortex-R5 #0 (Halted) 4 Cortex-R5 #1 (Lock Step Mode) 5 APU 6 Cortex-A72 #0 (Running) 7 Cortex-A72 #1 (Running) 8 PPU 9 MicroBlaze PPU (Sleeping) 10 PSM 11 MicroBlaze PSM (Sleeping) 12 PMC 13 PL 14 DPC
Download the hello_world_r5 application on the Arm Cortex-R5F Core 0.
Select RPU Cortex-R5F Core 0 target ID.
tcl xsct% targets 3 xsct% rst -processor
The command rst -processor clears the reset on an individual processor core. This step is important because when the AMD Versalâ„¢ device boots the JTAG boot mode, all the Cortex- A72 and Cortex-R5F cores are held in reset. You must clear the resets on each core, before debugging on these cores. The rst command in XSDB can be used to clear the resets.
Note
The command rst -cores clears resets on all the processor cores in the group (such as APU or RPU), of which the current target is a child. For example, when Cortex-A72 #0 is the current target, rst -cores clears resets on all the Cortex-A72 cores in APU.
xsct% dow {C:\edt\edt_vck190\helloworld_r5\Debug\helloworld_r5.elf}or
xsct% dow C:/edt/edt_vck190/helloworld_r5/Debug/helloworld_r5.elfAt this point, you can see the sections from the elf file downloaded sequentially. The XSCT prompt can be seen after a successful download. Now, configure a serial terminal (Tera Term, Mini com, or the Vitis software platform Serial Terminal interface for UART-0 USB-serial connection).