Loading PetaLinux Images on a Versal Board using JTAG - Loading PetaLinux Images on a Versal Board using JTAG - 2025.2 English - UG1305

This section describes how to load Versal PetaLinux images using JTAG mode on the Versal board.

1. Build the Linux images using the command:

   $petalinux-build
   

2. Build the BOOT.BIN using the command:

   $petalinux-package --boot --uboot
   

3. Create the Tcl script using petalinux command from the Versal project directory:

   $petalinux-boot --jtag --kernel --tcl versal.tcl
   

   Note

   The versal.tcl file includes commands to select appropriate targets and download application files to required locations in the DDR memory.

   

4. Modify the generated versal.tcl file as follows:

   1. Rename ramdisk.cpio.gz to rootfs.cpio.gz.u-boot as this tutorial uses the rootfs image.

   2. Add the following lines to load BOOT.BIN to the DDR memory before the con command:

      puts stderr "INFO: Loading image: BOOT.BIN at 0x70000000"
      dow -data -force "BOOT.BIN" 0x70000000
           after 2000
      

5. Set the boot mode switch SW1 to ON-ON-ON-ON JTAG boot mode, as shown in the following figure.

   

6. Configure the Tera Term serial application with default serial settings 115200,N8 and open the Tera Term console.

7. In the XSCT console, connect to the target over JTAG using the connect command:

   xsct% connect
   

   The connect command returns the channel ID of the connection.

8. Run the following target command to list the available targets and select a target using its ID.

   xsct% targets
   

   The IDs can change from session to session as the targets are assigned IDs as they are discovered on the JTAG chain.

9. Download the versal.tcl file which will load the BOOT.BIN, rootfs.cpio.gz.uboot, and boot.scr images on the DDR memory of the VCK190 board using the following commands:

   xsct% targets 1
   xsct% rst
   xsct > source versal.tcl
   

10. After running the preceding commands, you can see the PLM and U-Boot boot logs on the serial console. For example:

    U-Boot 2022.01 (Feb 16 2022 - 14:57:10 +0000)
    
    CPU:   Versal
    Silicon: v2
    Model: Xilinx Versal vck190 Eval board revA
    DRAM:  8 GiB
    EL Level:       EL2
    MMC:   mmc@f1050000: 0
    Loading Environment from nowhere... OK
    In:    serial@ff000000
    Out:   serial@ff000000
    Err:   serial@ff000000
    Bootmode: JTAG_MODE
    Net:
    ZYNQ GEM: ff0c0000, mdio bus ff0c0000, phyaddr 1, interface rgmii-id
    zynq_gem ethernet@ff0c0000: Failed to read eth PHY id, err: -2
    
    Warning: ethernet@ff0c0000 (eth0) using random MAC address - fe:77:f4:77:5c:c7
    eth0: ethernet@ff0c0000
    ZYNQ GEM: ff0d0000, mdio bus ff0c0000, phyaddr 2, interface rgmii-id
    zynq_gem ethernet@ff0d0000: Failed to read eth PHY id, err: -2
    
    Warning: ethernet@ff0d0000 (eth1) using random MAC address - c6:e7:dd:d5:b1:05
    , eth1: ethernet@ff0d0000
          Hit any key to stop autoboot:  5  4  3  2  0
          Versal>