Boot and Configuration - 2023.2 English

Versal Adaptive SoC Embedded Design Tutorial (UG1305)

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2023.2 English

The purpose of this chapter is to show how to integrate and load boot loaders, bare-metal applications (For APU/RPU), and the Linux Operating System for AMD Versal™ devices. This chapter discusses the following topics:

  • System software: PLM, Trusted firmware-A (TF-A), and U-Boot.

  • Steps to generate boot image for standalone application.

  • Boot sequences for SD boot and QSPI boot modes.

You can achieve these configurations using the AMD Vitis™ software platform and the PetaLinux tool flow. While Versal CIPS and NoC (DDR) IP Core Configuration focused only on creating software blocks for each processing unit in the PS, this chapter explains how these blocks can be loaded as a part of a larger system.

System Software

The following system software blocks cover most of the boot and configuration for this chapter.

Platform Loader and Manager

The platform loader and manager (PLM) is the software that runs on one of the dedicated processors in the Platform Management Controller (PMC) block of the Versal device. It is responsible for boot and run time management, including platform management, error management, partial reconfiguration, and subsystem restart of the device. The PLM can reload images, and load partial PDIs and service interrupts. The PLM reads the programmable device image from the boot source and configures the components of the system, including the NoC initialization, DDR memory initialization, programmable logic, and processing system, and then completes the device boot.


U-Boot acts as a secondary boot loader. After the PLM handoff, U-Boot loads Linux onto the Arm A72 APU and configures the rest of the peripherals in the processing system based on the board configuration. U-Boot can fetch images from various memory sources such as SATA, TFTP, SD, and QSPI. U-Boot can be configured and built using the PetaLinux tool flow.

Trusted Firmware-A

The Trusted Firmware-A (ATF) is a transparent bare-metal application layer executed in Exception Level 3 (EL3) on the APU. The ATF includes a Secure Monitor layer for switching between the secure and the non-secure world. The Secure Monitor calls and implementation of Trusted Board Boot Requirements (TBBR) makes the ATF layer a mandatory requirement to load Linux on the APU on Versal devices. The PLM loads the ATF to be executed by the APU, which keeps running in EL3 awaiting a service request. The PLM also loads U-Boot into the DDR memory to be executed by the APU. The DDR memory loads the Linux OS in the SMP mode on the APU. The ATF (bl31.elf) is built, by default, in PetaLinux. You can find it in the PetaLinux project images directory.

Generating Boot Image for Standalone Application

The Vitis software platform supports boot image creation wizard for Versal devices. To generate a boot image PDI or Boot.bin, you can either use Bootgen command line options or use the wizard in Vitis. This tutorial shows how to create Boot image using Bootgen, which is released as a part of the Vitis software platform package. The primary function of Bootgen is to integrate the various partitions of the bootable image. Bootgen uses a BIF file (Bootgen Image Format) as an input and generates a single file image in binary BIN or PDI format. It outputs a single file image which can be loaded into non-volatile memory (QSPI or SD card). Use the following steps to generate a PDI/BIN file:

  1. Open the XSCT Console view in the Vitis IDE, if not already open, by clicking on Window → Show View. Type xsct console within the search bar of the Show View wizard. Click Open to open the console.

  2. Create a folder where you want to generate the boot image by typing the following command in the XSCT Console:

    mkdir bootimages
    cd bootimages/
  3. Copy the sd_boot.bif file present within the <design-package>/<board-name>/ready_to_test/qspi_images/standalone/<cips or cips_noc>/<apu or rpu>/ directory, the PDI file present within <Vitis platform project>/hw/<.pdi-file>, and the application elf files present within the <Vitis application-project>/Debug folder to the folder created in step 2.


    If needed, open the sd_boot.bif file in a text editor of your choice and modify the name of the PDI or elfs as per your Vitis projects.

  4. Run the following command in the XSCT Console view.

    bootgen -image <bif filename>.bif -arch versal -o BOOT.BIN

    The following log is displayed in the XSCT Console view.


Loading PetaLinux Images on a Versal Board using JTAG

This section describes how to load Versal PetaLinux images using JTAG mode on the Versal board.

  1. Build the Linux images using the command:

  2. Build the BOOT.BIN using the command:

    $petalinux-package --boot --uboot
  3. Create the Tcl script using petalinux command from the Versal project directory:

    $petalinux-boot --jtag --kernel --tcl versal.tcl


    The versal.tcl file includes commands to select appropriate targets and download application files to required locations in the DDR memory.

  4. Modify the generated versal.tcl file as follows:

    1. Rename ramdisk.cpio.gz to rootfs.cpio.gz.u-boot as this tutorial uses the rootfs image.

    2. Add the following lines to load BOOT.BIN to the DDR memory before the con command:

      puts stderr "INFO: Loading image: BOOT.BIN at 0x70000000"
      dow -data -force "BOOT.BIN" 0x70000000
           after 2000
  5. Set the boot mode switch SW1 to ON-ON-ON-ON JTAG boot mode, as shown in the following figure.