Self-Suspend Behavior - Self-Suspend Behavior - 2026.1 English - UG1304

Versal Adaptive SoC System Software Developers Guide (UG1304)

Document ID
UG1304
Release Date
2026-06-23
Version
2026.1 English

In the SMC build, the XilPM client does not send PM_SELF_SUSPEND or PM_ABORT_SUSPEND to the PLM through the SMC transport. CPU self-suspend is performed using the standard Arm Power State Coordination Interface (PSCI) CPU_SUSPEND service that TF-A implements, and TF-A coordinates the corresponding PM action with the PLM. The application uses the same XilPM client suspend sequence as in the IPI build:

  • The application calls XPm_SelfSuspend() to declare the suspend intent. In the SMC build, this call returns success without issuing an SMC, because the suspend is performed by the subsequent PSCI call.
  • The application calls XPm_SuspendFinalize(). In the SMC build, this function flushes the data cache (when enabled), records a resume marker, and issues a PSCI CPU_SUSPEND request via SMC, with the EL1 vector base address as the resume entry point and a power‑down power state.
  • On a successful CPU power-down, the call does not return in the same execution path. On resume, execution restarts at the BSP entry vector and the application can use XPm_GetBootStatus() to detect PM_RESUME.
  • PM_ABORT_SUSPEND is therefore unnecessary in the SMC path: because PM_SELF_SUSPEND is not sent to the PLM, there is no pending suspend to abort.