Segmented Configuration - 2025.1 English - UG1304

Versal Adaptive SoC System Software Developers Guide (Versal AI Edge Series Gen 2 and Versal Prime Series Gen 2) (UG1304)

Document ID
UG1304
Release Date
2025-06-23
Version
2025.1 English

Segmented Configuration is a solution that enables you to boot the processors in the PS of the Versal Adaptive SoC, and access the DDR memory (or other similar blocks) before the programmable logic (PL) is configured. This allows DDR based softwares like Linux or U-Boot to boot first, followed by the PL, that you can configure later if required using any primary or secondary boot devices, or through a DDR image store. Segmented configuration feature is intended to treat the Versal Adaptive SoC boot sequences similar to the boot sequences for Zynq UltraScale+ MPSoC. For more details see Versal Adaptive SoC Design Guide (UG1273).