In the Versal adaptive SoC, GT components switch from Common/Channel to GT Quad granularity. To enable some GT sharing use cases, developers modified GT wizard flows to use the Vivado IP integrator. Use the Vivado IP integrator to build system designs that use single or multiple GT Quads.
The design entry for custom IP connects to GT Quads via the Bridge IP. The Bridge IP instantiates, configures, and connects single or multiple GT Quad-based IP through Block Automation. For more information, refer to the Versal Adaptive SoC Transceivers Wizard LogiCORE IP Product Guide (PG331).
In addition to the Transceivers Wizard, AMD provides the Versal adaptive SoC Transceiver Subsystem IP. This IP offers a higher-level, more integrated transceiver implementation approach. The Transceivers Wizard provides low-level access to GT primitives. It supports custom protocol development.
The Transceiver Subsystem IP provides pre-configured protocol stacks. It integrates clocking and reset management. It offers system-level connectivity features that simplify implementation of standard protocols like PCIe and Ethernet.
For most users implementing standard protocols or requiring system-level integration, the Transceiver Subsystem is the recommended starting point. For detailed information about the Transceiver Subsystem IP, refer to the Versal Adaptive SoC Transceiver Subsystem Product Guide (PG442).
When migrating your design to the Versal device, consider the Transceiver Subsystem IP for standard protocols. It offers a more streamlined migration path with built-in system integration features. However, you must be aware of the full GT Quad layout and supported configuration options regardless of which IP you choose. For detailed architectural differences, refer to the following documents: