Certain PMC and LPD peripherals route through the extended multiplexed I/O (EMIO) interface. This interface routes them via the PL to XPIO/X5IO or HD I/O via I/O logic. For details on which peripherals can access the EMIO, refer to this link in the Versal Adaptive SoC Technical Reference Manual (AM011). For Versal AI Edge Series Gen 2 and Versal Prime Series Gen 2, refer to the Versal AI Edge Series Gen 2 and Prime Series Gen 2 Technical Reference Manual (AM026).
On the CIPS/PS Wizard IP, use the IO Configuration page to select EMIO peripherals. EMIO uses I/O logic. EMIO pin planning uses the traditional drag-and-drop pin planning in the Vivado Design Suite.
For XPIO banks, the recommendation is to place the lower-speed I/O logic last to maximize package pin utilization. Previously assigned I/Os can limit available I/O standards. You must ensure that your interface is feasible in the desired bank or banks. You can use the IBIS models to simulate the interface at your required speed with the I/O standard selected for your bank.