Use C/C++ code and the Vitis HLS tool to develop PL kernels. The Vitis HLS tool simplifies the use of C/C++ functions for implementation as PL kernels in the Vitis application acceleration development flow.
The Vitis HLS tool automates code changes. It helps implement and optimize the C/C++ code in programmable logic. It achieves low latency and high throughput.
The Vitis HLS tool allows inference of required pragmas to produce the right interface for your function arguments. It also allows inference of required pragmas to pipeline loops and functions within your code. The Vitis HLS tool infers required pragmas to create correct interfaces for function arguments and to pipeline loops and functions within your code.
The Vitis HLS design flow includes the following main steps:
- Compile, simulate, and debug the C/C++ algorithm.
- View reports to analyze and optimize the design.
- Synthesize the C algorithm into an RTL design.
- Verify the RTL implementation using the Vitis HLS co-simulation flow.
- Compile the RTL implementation into a compiled object file (.xo extension), or export to an RTL IP.
For more information, refer to the of the Versal Adaptive SoC Design Process Hubs: Hardware, IP, and Platform Development Guided - Platform Based.