The Versal adaptive SoC includes the DSP58 slice, which is a superset of and backward compatible with the UltraScale+ device DSP48E2 slice. In addition, the Versal adaptive SoC DSP Engine supports floating-point operations in a single DSP58 slice. It can combine two back-to-back DSP58 slices with dedicated interconnect to build an 18-bit complex multiplier or complex multiply-accumulate (MACC). The Versal adaptive SoC supports DSPFP32 mode through the Floating-Point Operator IP or the Vitis HLS tool. If you want to use this mode in your RTL design, update the Floating-Point Operator IP in your migrated design.
AMD supports automated migration of instantiated DSP primitives to the Versal adaptive SoC legacy primitive (DSP48E5). To achieve higher performance and utilization, AMD recommends updating your RTL to the Versal adaptive SoC RTL templates and resynthesizing your design.
For detailed architectural differences, refer to the Versal Adaptive SoC DSP Engine Architecture Manual (AM004).